Mulong Luo

          Ph.D. candidate
          Cornell University
          ml2558 AT cornell DOT edu

          Vita, Google Scholar, LinkedIn, Twitter


I am a sixth-year Ph.D. candidate in the School of Electrical and Computer Engineering at Cornell University, advised by Prof. Edward Suh. I am interested in architecture and cyber-physical systems security, and machine learning.

I am co-organizing RL4CAS Tutorial collocated with ISCA 2023. See you in Orlando, FL!


  • Doctor of Philosophy, Computer Engineering, Cornell University, 2017-now.

  • Master of Science, Computer Science, University of California San Diego, 2017.

  • Bachelor of Science, Microelectronics, Peking University, 2014.

Research Interests

  • Machine learning (esp reinforcement learning) for security and hardware

  • Security of computer architecture and cyber-physical systems

  • Trusted execution environments, side channels

Selected Publications

  • J. Cui, X. Yang*, M. Luo*, G. Lee*, et. al.,, “MACTA: A Multi-agent Reinforcement Learning Approach for Cache Timing Attacks and Detection”, accepted to International Conference on Learning Representation (ICLR), 2023. [pdf-preprint] (* Equal contributions.)

  • M. Luo*, W. Xiong*, et. al., “AutoCAT: Reinforcement Learning for Automated Exploration of Cache Timing-Channel Attacks”, accepted to IEEE International Symposium on High Performance Computer Architecture (HPCA), 2023. [pdf-preprint][code](* Equal contributions.)

  • M. Luo, G. E. Suh, “Accelerating Path Planning for Autonomous Driving with Hardware-assisted Memorization”, in International conference on Application-specific Systems, Architectures and Processors (ASAP), 2022. [pdf]

  • M. Luo, G. E. Suh, “Interrupt Attack on TEE for Robotic Vehicles”, in Automobile and Autonomous Vehicle Security Workshop (AutoSec), 2022, collocated with Networked and Distributed System Symposium (NDSS). [pdf][talk]

  • M. Luo, A. C. Myers, G. E. Suh, “Stealthy Tracking of Autonomous Vehicles with Cache Side Channels”, in 29th USENIX Security Symposium, 2020, pp.859-876 [pdf] [slides][talk] (Shortlisted for Top Picks in Hardware and Embedded Security 2022.)

  • J. H. Lin, X. Jiao, M. Luo, R. K. Gupta “Vulnrability of Hardware Neural Network to Dynamic Operation Point Variations”, in IEEE Design and Test 37(5), pp. 75-84.

  • Z. Fang, M. Luo, et al., “Mitigating multi-tenant interference in continuous mobile offloading”, International Conference on Cloud Computing 2018, 20-36.[pdf]

  • J. Liu, J. C. Davies, A. Ferraiuolo, A. Ivanov, M. Luo, et al., “Secure Autonomous Cyber-Physical Systems Through Verifiable Information Flow Control”, in Workshop on Cyber-Physical Systems Security and PrivaCy (CPS-SPC), collocated with ACM Conference on Computer and Communications Security (CCS), 2018, pages 48-59 (Best Paper Award). [pdf]

  • X. Jiao, M. Luo, J. H. Lin, R. K. Gupta, “An Assessment of Vulnerability of Hardware Neural Networks to Dynamic Voltage and Temperatrue Variations”, in Internaional Conference on Computer-Aided Design (ICCAD), 940-950.

  • Z. Fang, M. Luo, F. Anwar, H. Zhuang, R. Gupta, “Go-realtime: a lightweight framework for multiprocessor real-time system in user space”, in ACM SIGBED Review, Vol 14, Issue 4, pp. 46-52. [pdf]

  • A. B. Kahng, M. Luo, S. Nath, “SI for Free: Machine Learning of Interconnect Coupling Delay and Transition Effects”, in ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), pp.1-8. [pdf]


  • Organizer:
    • Reinforcement Learning for Computer Architecture and Systems (RL4CAS) Tutorial, co-located with International Symposium on Computer Architecture (ISCA), 2023.
  • Technical Program Committee:
    • USENIX Security Symposium, 2024.
    • ACM Conference on Computer and Communications Security (CCS), 2023.
    • International Symposium on Research in Attacks, Intrusions and Defenses (RAID), 2023.
    • ISOC Symposium on Vehicle Security and Privacy (VehicleSec), co-located with Symposium on Networked and Distributed System Security (NDSS), 2023.
    • Workshop on Hardware and Architectural Support for Security and Privacy (HASP), co-located with International Symposium on Microarchitecture (MICRO), 2023.
    • Workshop on Attacks and Solutions in Hardware Security (ASHES), co-located with ACM CCS, 2023.
  • Reviewer/External Reviewer:
    • Conference on Cryptographic Hardwareand Embedded Systems (CHES), 2023.
    • ACM/IEEE International Symposium on Computer Architecture (ISCA), 2020.
    • ACM/IEEE Design Automation Conference (DAC), 2016, 2017.
    • IEEE Transcations on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), 2022, 2017.
    • Integration, the VLSI Journal, 2016.
  • Artifact Evaluation Committee:
    • USENIX Security Symposium, Artifact Evaluation Committee, 2023.
    • USENIX Symposium on Operating Systems Design and Implementation (OSDI), Artifact Evalutaion Committee, 2022.
    • USENIX Annual Technical Conference (ATC), Artifact Evaluation Committee, 2022.


I have been serving as a teaching assistant for multiple undergradudate and graduate-level courses at Cornell and UCSD.

  • Head TA, ECE2300, Digital Logic and Computer Organization, 2020 Fall at Cornell by Prof. David Albonesi

  • TA, ECE5770, Resilient Computer Systems, 2019, 2018 Fall at Cornell by Prof. Edward Suh

  • Head TA, CSL140, Components and Design Techniques for Digital Systems, 2017 Spring at UCSD by Prof. C.K. Cheng

  • Head TA, CSL140L, Digital Circuits Laboratory, 2017 Winter at UCSD by Prof. Rajesh Gupta and visiting Prof. Avind from MIT


  • Yifang Yang, Yan Zhang, Master of Engineering Design Project “An Architecture for Secure GPIO Access in Robot System on TrustZone Enabled ARM Processors”, 2019.


  • System on Chip (SoC) platform architecture intern, Qualcomm Inc., 2021.

  • Software Reseach and Development Intern, Synopsys Inc., 2016.